1. Field of the Invention
An aspect of the present invention relates to semiconductor memory wherein data can be electrically rewritten and a manufacturing method thereof.
2. Description of the Related Art
To advance higher integration and larger capacity of semiconductor memory, the minimum design rule needs to be reduced. To reduce the minimum design rule, further micromachining of wiring patterns, etc., becomes necessary. To realize further micromachining of wiring patterns, etc., very advanced machining technique is required and therefore it becomes difficult to reduce the minimum design rule.
In recent years, to enhance the integration degree of memory, a large number of semiconductor memories each with memory cells placed three-dimensionally have been proposed. (For example, refer to JP-A-2003-078044, U.S. Pat. Nos. 5,599,724, 5,707,885 and Endo et al., “Novel Ultrahigh-Density Flash Memory With a Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell”, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO 4, pp 945-951, April 2003.)
In most of the semiconductor memories in the related arts each with memory cells placed three-dimensionally, the memory cells are stacked simply and an increase in the cost with an increase in the number of stacks is not circumvented.
In stack-type nonvolatile semiconductor memory in the related arts, word lines, bit lines, and source lines exist independently for each layer. Therefore, as the number of stacks increases, the number of driver transistors for driving the word lines, the bit lines, and the source lines increases and an increase in the chip area is not circumvented.